Researchers develop a new fabrication process that integrates high-performance gallium nitride transistors onto standard silicon CMOS chips in a way that is low-cost and scalable.
MIT
Researchers at MIT and collaborating institutions have developed a new fabrication process that integrates high-performance gallium nitride (GaN) transistors onto standard silicon CMOS chips.
This method addresses the previous challenges of high cost and specialized integration requirements associated with GaN, making its use more accessible for various electronic applications.
“Gallium nitride is the second most widely used semiconductor in the world, just after silicon, and its unique properties make it ideal for applications such as lighting, radar systems, and power electronics,” said the researchers in a press release.
“The material has been around for decades, and to get access to its maximum performance, chips made of GaN need to be connected to digital chips made of silicon, also called CMOS chips.”
Creating many tiny gallium nitride transistors
The team’s process involves creating many tiny GaN transistors on a GaN chip. Each transistor, or “dielet,” measuring 240 by 410 microns, is then separated and bonded onto a silicon chip.
This bonding occurs using a low-temperature copper-to-copper process, which maintains the functionality of both materials. Adding only a small amount of GaN to the silicon chip keeps the overall cost low while significantly boosting performance with compact, high-speed transistors. Spreading these discrete GaN transistors across the silicon chip also helps to reduce the system’s temperature.
To show their method’s effectiveness, the researchers built a power amplifier, a key component in mobile phones. This amplifier demonstrated better signal strength and efficiency compared to devices with traditional silicon transistors. This could lead to improved call quality, increased wireless bandwidth, better connectivity, and extended battery life for a smartphone.
Pradyot Yadav, an MIT graduate student and lead author of the paper describing this method, highlighted the benefits of this hybrid chip technology.
“If we can bring the cost down, improve the scalability, and, at the same time, enhance the performance of the electronic device, it is a no-brainer that we should adopt this technology,” he concluded.
“We’ve combined what exists in silicon with the best possible gallium nitride electronics. These hybrid chips can revolutionize many commercial markets.”
Compatible with standard procedures
The new integration scheme is compatible with standard semiconductor foundries. It uses standard procedures and a low-temperature copper bonding process, avoiding the use of expensive gold and high temperatures that can damage typical equipment.
This compatibility means the method can improve current electronics and future technologies. The researchers also believe this integration could support quantum applications, as GaN performs well at the cryogenic temperatures needed for some types of quantum computing.
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Gallium nitride is a widely used semiconductor known for its properties suitable for lighting, radar systems, and power electronics.
The ability to integrate high-performance GaN transistors onto silicon chips in a scalable way allows for broader use of GaN. The successful creation of a high-performance power amplifier indicates the immediate potential of this technology in wireless communication and other areas.
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